1. Field of the Invention
This invention pertains to semiconductor manufacturing and, more particularly, to controlling the operational parameters of a multi-chamber process tool.
2. Description of the Related Art
The semiconductor industry constantly seeks to increase quality, reliability and throughput in producing integrated circuit devices from these fabrication processes. This drive is fueled by consumer demands for higher quality computers and electronic devices that operate more reliably. These demands have resulted in a continual improvement in the manufacture of semiconductor devices, e.g., transistors, as well as in the manufacture of integrated circuit devices incorporating such transistors. Additionally, reducing defects in the manufacture of the components of a typical transistor also lowers the overall cost per transistor as well as the cost of integrated circuit devices incorporating such transistors.
The technologies underlying semiconductor processing tools have attracted increased attention over the last several years, resulting in substantial refinements. Semiconductor devices, or microchips or integrated circuit devices, are manufactured from wafers of a substrate material. Layers of materials are added, removed, and/or treated during fabrication to create the integrated, electrical circuits that make up the device. The fabrication essentially comprises four basic operations. The four operations are:
layering, or adding thin layers of various materials to a wafer from which a semiconductor is produced;
patterning, or removing selected portions of added layers;
doping, or placing specific amounts of dopants in the wafer surface through openings in the added layers; and
heat treatment, or heating and cooling the materials to produce desired effects in the processed wafer.
Although there are only four basic operations, they can be combined in hundreds of different ways, depending upon the particular fabrication process. See, e.g., Peter Van Zant, Microchip Fabrication A Practical Guide to Semiconductor Processing (3d Ed. 1997 McGraw-Hill Companies, Inc.) (ISBN 0-07-067250-4).
The fabrication process generally involves processing a number of wafers through a series of fabrication tools. This is broadly referred to as the xe2x80x9cprocess flow.xe2x80x9d Each fabrication tool performs one or more of the four basic operations. The four basic operations are performed in accordance with an overall process to finally produce wafers from which the semiconductor devices are obtained. One important aspect of the manufacturing process is process control. In particular, the fabrication tools and the fabrication environment must be controlled to achieve a satisfactory process. Certain operational parameters may be monitored and, when desired, the tool""s operation can be altered to improve the process to yield more or better wafers.
Competitiveness in the semiconductor manufacturing industry is driven by increasingly complex product and process technologies and pressures on manufacturers to improve cycle time, quality, and process flexibility. Requirements for sub-quarter-micron device manufacturing and advanced batch control technologies are increasingly important. As wafer sizes increase and feature sizes shrink, equipment and facilities costs rise significantly. Advanced factory-level process control is now recognized as a vital technology for achieving the yield and productivity levels required to compete effectively, but its deployment has been limited to date by the lack of sufficient integration technology and standards.
Important characteristics in factory-level process controls include:
scalabilityxe2x80x94can be applied to a single process tool and its dedicated metrology or across multiple interdependent process areas; the system can be installed on a single computer, or spread across a distributed platform of multiple machines, depending on the performance and reliability requirements;
compatibility with existing systemsxe2x80x94designed and validated to work with today""s manufacturing systems;
flexibilityxe2x80x94control functions are not xe2x80x9chard-wiredxe2x80x9d into the architecture, but rather embodied in the scripts and control application xe2x80x9cplug-insxe2x80x9d; and
standards-basedxe2x80x94components communicate among themselves using standardized protocols Still other factors may become important, and perhaps even predominate, depending on the context of a particular implementation.
The failure of current process controls to adopt these characteristics engenders numerous inefficiencies. Traditional process control has been what is known as statistical process control (xe2x80x9cSPCxe2x80x9d). SPC usually detects only two types of process problems. An abrupt change in process behavior or incoming material will be flagged when one or two SPC data points fall near or outside the SPC control limits. For example, a shift in a process will be detected by SPC rules that look for four out of five points more than one sigma away from the process mean, or eight consecutive points all on one side of the process mean. SPC systems typically provide for corrective actions to be defined for each of their rules. Abrupt changes will elicit an indication that there is a problem, prompting for manual identification and resolution.
Thus, one area in which to seek improvements is in process control. Each of the four operations listed above requires controlling numerous parameters, as does the overall fabrication process. Among the parameters it would be useful to monitor and control are critical dimensions (xe2x80x9cCDsxe2x80x9d) and doping levels for transistors (and other semiconductor devices), as well as overlay errors in photolithography. CDs are the smallest feature sizes that particular processing devices may be capable of producing. For example, the minimum widths w of polycrystalline (xe2x80x9cpolysiliconxe2x80x9d or xe2x80x9cpolyxe2x80x9d) gate lines for metal oxide semiconductor field effect transistors (xe2x80x9cMOSFETsxe2x80x9d or xe2x80x9cMOSxe2x80x9d transistors) may correspond to one CD for a semiconductor device having such transistors. Similarly, the junction depth dj (depth below the surface of a doped substrate to the bottom of a heavily doped source/drain region formed within the doped substrate) may be another CD for a semiconductor device such as an MOS transistor. Doping levels may depend on dosages of ions implanted into the semiconductor devices, the dosages typically being given in numbers of ions per square centimeter at ion implant energies typically given in kilo-electronVolts (xe2x80x9ckeVxe2x80x9d).
Despite the advances made in this area, many of the processing tools that are currently commercially available suffer certain deficiencies. In particular, such tools often lack advanced process data monitoring capabilities, such as the ability to provide historical parametric data in a user-friendly format, as well as event logging, real-time graphical display of both current processing parameters and the processing parameters of the entire run, and remote, i.e., local site and worldwide, monitoring. These deficiencies can engender nonoptimal control of critical processing parameters, such as throughput accuracy, stability and repeatability, processing temperatures, mechanical tool parameters, and the like. This variability manifests itself as within-run disparities, run-to-run disparities and tool-to-tool disparities that can propagate into deviations in product quality and performance.
However, the traditional SPC techniques are often inadequate to control precisely CDs and doping levels in semiconductor and microelectronic device manufacturing to optimize device performance and yield. Typically, SPC techniques set a target value, and a spread about the target value, for the CDs, doping levels, and/or overlay errors in photolithography. The SPC techniques then attempt to minimize the deviation from the target value without automatically adjusting and adapting the respective target values to optimize the semiconductor device performance, as measured by wafer electrical test (xe2x80x9cWETxe2x80x9d) measurement characteristics, for example, and/or to optimize the semiconductor device yield and throughput. Furthermore, blindly minimizing non-adaptive processing spreads about target values may not increase processing yield and throughput.
One example of this lack of control may be found in multi-chamber processing tools. Many fabrication tools contain multiple operation chambers, sometimes as many as six, conducting the same operation on different wafers. For example, a chemical vapor deposition (xe2x80x9cCVDxe2x80x9d) tool might have six wafers undergoing treatment in six different deposition chambers. The deposition process should, ideally, result in wafers having the same critical characteristics. In the case of the CVD tool, each of the wafers in the various chambers should have matching refractive indices, thicknesses, stress, etc. However, the operational parameters, e.g., radio frequency (xe2x80x9cRFxe2x80x9d) power, silane flow, N2O flow, pressure, etc., for each chamber are manually set.
Variations in the manual settings, even within specified ranges, and the timing of the settings can result in variations among the wafers. These variations then are passed on to the next operation in the process flow, thereby complicating control in the next operation. Typically, the variations in one operations yield variations in the next, and the imperfection ripples throughout the process flow. Even where the variations do not produce fatal defects requiring the resulting semiconductor devices to be scrapped, they may cause variations in device performance.
The SPC techniques discussed above are proving ineffectual in dealing with this kind of problem, and the industry is looking for alternatives. One standard being formulated in the semiconductor fabrication industry is the Advanced Process Control (xe2x80x9cAPCxe2x80x9d) Framework (xe2x80x9cAPCFWxe2x80x9d). The APC standard will provide run-to-run control of and fault detection in semiconductor processing equipment. However, the APC standard, although an improvement on traditional SPC techniques, also does not address the kind of inefficiencies and process difficulties discussed above.
The present invention is directed to overcoming, or at least reducing the effects of, one or more of the problems set forth above.
The invention, in its various aspects and embodiments, is a method and apparatus for controlling the operation of a multi-chamber process tool in a semiconductor fabrication process.
The method comprises setting a plurality of operation parameters for the conduct of a predetermined operation in each of a plurality of process chambers in a multi-chamber process tool; performing the predetermined operation in each of the process chambers; examining a physical characteristic of a processed wafer from each of the process chambers; determining from the examined physical characteristics whether the operating conditions in each of the process chambers match; and resetting at least one operating parameter so that the operating conditions in each of the process chambers will match.
The apparatus comprises a processing tool, a review station, and a tool controller. The processing tool includes a plurality of process chambers and an operation controller. Each process chamber is capable of performing a predetermined operation defined by a plurality of operating parameters. The operation controller is capable of setting the operating parameter for each of the process chambers. The review station is capable of examining a physical characteristic of a processed wafer from each of the process chambers and outputting the results of the examination. The tool controller is capable of receiving the examination result, determining whether the operating parameters of the process chambers match, and instructing the operation controller to reset at least some of the operating parameters responsive thereto to match the operating conditions in the process chambers.